基本信息

 

王瑞涛，2015-2019年于西安交通大学微电子学院获学士学位，2019-2024年于清华大学集成电路学院获博士学位，2024年加入西安交通大学微电子学院，入选西安交通大学“青年优秀人才支持计划”A类，目前担任助理教授。近年来，从事射频毫米波集成电路设计及电路设计自动化研究，在IEEE TMTT、TCAS、MWCL、TCAD等国际权威期刊以及ISSCC、VLSI、CICC等国际重要会议上发表学术论文10余篇，公开和授权国家发明专利2项。曾获得教育部集成电路奋进奖学金、教育部集成电路高层次紧缺人才专项A类奖学金、国家奖学金、清华大学综合一等奖学金、清华大学集成电路一等奖学金、清华大学启航奖、优秀毕业生、西安交通大学一等奖学金等多项表彰奖励。

 

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研究领域及科研成果

  • 研究领域

  1.  射频毫米波集成电路设计
  2.  电路设计自动化

  • 代表性论文：

  1. Wang R, Li C, et al. A Ka-Band Broadband Power Amplifier with Transformer-Based Lossy Magnetically Coupled Resonator Network: Analysis and Design[J]. IEEE Transactions on Microwave Theory and Techniques, 2024.
  2. Wang R, Li C, et al. A Broadband Variable-Gain Low-Noise Amplifier with low NF and Dual Phase Compensation[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2024.
  3. Wang R, Zhu W, et al. An Adaptive Analog Temperature Compensated W-Band Front-End with ±0.0033 dB/℃ Gain Variation across -30 ℃ to 120 ℃[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2023.
  4. Wang R, Li C, et al. A 18-44 GHz Low Noise Amplifier With Input Matching and Bandwidth Extension Techniques[J]. IEEE Microwave and Wireless Components Letters, 2022.
  5. Wang R, Li C, et al. An Improved Through-Only De-Embedding Method for 110GHz On-Wafer RF Device Characterization[J]. IEEE Microwave and Wireless Components Letters, 2022.
  6. Wang R, Wang Z, et al. A Fully Integrated X-band Phased-Array Transceiver in 0.13μm CMOS Technology[C]. 2021 IEEE International Symposium on Radio Frequency Integration Technology
  7. Yin S, Wang R, et al. Automatic Design for W-Band Front-End System via Bottom-Up Sizing and Layout Generation[J]. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024.
  8. Yin S, Wang R, et al. Fast Surrogate-Assisted Constrained Multi-objective Optimization for Analog Circuit Sizing via Self-Adaptive Incremental Learning[J]. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023.
  9. Yin S, Wang R, et al. Asynchronous Parallel Expected Improvement Matrix-Based Constrained Multi-Objective Optimization for Analog Circuit Sizing[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2022.
  10. Zhu W, Wang R, et al. An Ultra-compact Bidirectional T/R Folded 25.8-39.2GHz Phased-Array Transceiver Front-End with Embedded TX Power Detection/Self-calibration Path Supporting 64/256/512QAM at 28/39GHz band for 5G in 65nm CMOS Technology[C]. 2022 IEEE Symposium on VLSI Technology (VLSI).
  11. Zhu W, Wang J, Wang R, et al. A 1V 32.1 dBm 92-to-102GHz Power Amplifier with a Scalable 128-to-1 Power Combiner Achieving 15% Peak PAE in a 65nm Bulk CMOS Process[C]. 2022 IEEE International Solid- State Circuits Conference (ISSCC).
  12. Zhu W, Wang J, Wang R, et al. A 1V W-Band Bidirectional Transceiver Front-End with <1dB T/R Switch Loss, <1°/dB Phase/Gain Resolution and 12.3% TX PAE at 15.1dBm Output Power in 65nm CMOS Technology [C]. 2021 IEEE International Solid- State Circuits Conference (ISSCC).
  13. Zhu W, Wang J, Wang R, et al. An Ultra-Compact 84.9-107GHz LNA with 4.9dB NF by Utilizing Coupled-line-based Gm-Boosting and Noise-Canceling Techniques in 65-nm CMOS Technology[C]. 2021 IEEE Custom Integrated Circuits Conference (CICC).
  14. Zhu W, Wang J, Wang R, et al. A Dual-Mode 24-32 GHz 4-Element Phased-Array Transceiver Front-End with SSA Beamformer for Autonomous Agile Unknown Signal Tracking and Blocker Rejection within <0.1 us and 21.3%/15% Transmitter Peak/OP1dB PAE[C]. 2021 IEEE Custom Integrated Circuits Conference (CICC).