Indexed by:Journal paper Document Code:advs.202200036 First Author:Yujie Song Correspondence Author:Xingsheng Wang Co-author:Qiwen Wu,Fan Yang,Chengxu Wang,Meiqing Wang,Xiangshui Miao Journal:Advanced Science Included Journals:EI、SCI Affiliation of Author(s):Huazhong University of Science and Technology Discipline:Engineering First-Level Discipline:Electronic Science And Technology Document Type:J Volume:9 Issue:15 Page Number:2200036 ISSN No.:2198-3844 Key Words:cascade, crosstalk, logic-in-memory, low-power, memristors, reconfiguration DOI number:10.1002/advs.202200036 Date of Publication:2022-03-27 Impact Factor:17.521 Abstract:The rise of emerging technologies such as Big Data, the Internet of Things, and artificial intelligence, which requires efficient power schemes, is driving brainstorming in data computing and storage technologies. In this study, merely relying on the fundamental structure of two memristors and a resistor, arbitrary Boolean logic can be reconfigured and calculated in two steps, while no additional voltage sources are needed beyond “±VP” and 0, and all state reversals are based on memristor set switching. Utilizing the proposed logic scheme in an elegant form of unity structure and minimum cost, the implementation of a 1-bit adder is demonstrated economically, and a promising circuit scheme for the N-bit adder is exhibited. Some critical issues including the crosstalk problem, energy consumption, and peripheral circuits are further simulated and discussed. Compared with existing works on memristive logic, such methods support building a memristor-based digital in-memory calculation system with high functional reconfigurability, simple voltage sources, and low power and area consumption. Links to published journals:https://onlinelibrary.wiley.com/doi/10.1002/advs.202200036?af=R