Prof. Dr. Xingsheng Wang is with School of Integrated Circuits at Huazhong University of Science and Technology (HUST) in Wuhan, China. He obtained PhD in Electronics and Electrical Engineering from University of Glasgow (supervised by Prof. Asen Asenov), UK, in 2010, and Master degree in Mathematics from Tsinghua University, Beijing, China in 2007 with the first prize, and Bachelor degree in Electronic Science and Technology from Beijing Technology and Business University in 2004 with the first prize.  He worked in University of Glasgow as Research Associate from 2010 to 2016, and in Synopsys as Senior Applications Engineer from 2016 to 2018. In 2018 he joined HUST as a full professor.

His research interest includes nanoscale electronic devices and systems, emerging memories and computing-in-memory chips, and design technology co-optimization (DTCO). His research explored the variability-aware DTCO methodology and applications. He contributed to the new memristive device integration, and logic-in-memory and analog/neuromorphic computing, circuit/chip design. He led the project to tapeout full-mask memristor chips successfully. 

He participated in several national/consortium projects including UK EPSRC projects, Scottish Funding Council project, and EU FP7/ENIAC/Horizon2020 projects, with the total funding of several million pounds. He is holding the grants from National Natural Science Foundation of China, National Key Research & Development Program of MOST, Provincial and Metropolitan Science and Technology projects, and well-known enterprise commissioned projects. He has published more than 100 scientific papers in Adv. Sci., EDL, TED, APL, IEDM, VLSI, SISPAD, ESSDERC etc, and 2 book chapters. 

He is the recipient of UK ORSAS, and Hubei Province 100 talents program. He is a senior member of IEEE, CAAI and CCF, and serves as conference TPC chairs and members, the golden reviewers of journals.

ORCID: 0000-0001-8335-2033