Personal Profile

Zhang Meng, associate professor, School of Computer Science and Technology, Huazhong University of Science and Technology (HUST). He received the Ph.D degree in Computer Science and Technology from HUST, Wuhan, China, in 2019. From July 2019 to June 2022, he continued to engage in postdoctoral research in Wuhan National Laboratory for Optoelectronics, HUST. From November 2017 to November 2018, he went to Rensselaer Polytechnic Institute as a visiting student. In July 2022, he joined the School of Computer Science and Technology, HUST.

His research interests include flash memory, new nonvolatile memory, optical storage, and channel coding. He has published more than 20 papers, including IEEE TCAD, IEEE TED, ACM TECS, IEEE TDMR, DATE, and ICCD etc. Seven invention patents and three software copyrights are authorized. He is a reviewer for internationally renowned journals such as IEEE TC, IEEE TED, IEEE TDMR, IEEE CL, JCST, and JSA etc.

Academic Degrees

September 2014-June 2019

Ph.D student, Wuhan National Laboratory for Optoelectronics, Huazhong University of Science and Technology

Professional Experience

June 2022-Now

Associate Professor, School of Computer Science and Technology, Huazhong University of Science and Technology     

July 2019-June 2022

Postdoctoral, Wuhan National Laboratory for Optoelectronics, Huazhong University of Science and Technology

Courses Taught

Discrete Mathematics

Awards and Honors

National Scholarship for Doctoral Students, 2017.

Selected Projects Funded

[1] National Key Research and Development Program, November 2022-October 2025, participate.

[2] National Natural Science Foundation of China, January 2022-December 2024, preside.

[3] Enterprise Cooperation Project, June 2022-March 2023, participate.

[4] Key Foundation of National Natural Science Foundation of China, January 2020- December 2024, participate.

[5] Key Project of Shandong Wisdom Joint Fund, January 2020-December 2022, preside.

[6] National Natural Science Foundation of China, January 2019-December 2022, participate.  

[7] China Postdoctoral Science Foundation, July 2019-November 2021, preside.

[8] Postdoctoral Innovative Talents Support Program, July 2019-June 2021, preside.

Selected Publications

[1] Meng Zhang, Fei Wu, Qin Yu, Neidong Fu, and Changsheng Xie. eLDPC: An efficient LDPC coding scheme for phase-change memory. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 2022, Early Access.

[2] Weihua Liu, Fei Wu, Xiang Chen, Meng Zhang, Yu Wang, Xiangfeng Lu, Changsheng Xie. Characterization summary of performance, reliability, and threshold voltage distribution of 3D charge-trap NAND flash memory. ACM Transactions on Storage. 2022, 18 (2): Article 16:1-25.

[3] Menghua Jia, Yachen Kong, Xuepeng Zhan, Meng Zhang, Fei Wu, and Jiezhi Chen. Optimal program-read schemes towards highly reliable open block operations in 3D charge-trap NAND flash memory. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 2022, 41 (11): 4797-4807.

[4] Meng Zhang, Fei Wu, Qin Yu, Weihua Liu, Ruixiang Ma, and Changsheng Xie. Exploiting resistance drift characteristics to improve reliability of LDPC-assisted phase-change memory. IEEE Transactions on Device and Materials Reliability. 2021, 21 (3): 324-330.

[5] Weihua Liu, Fei Wu, Meng Zhang, Chengmo Yang, Zhonghai Lu, Jiguang Wan, and Changsheng Xie. DEPS: Exploiting a dynamic error prechecking scheme to improve the read performance of SSD. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 2021, 40 (1): 66-77.

[6] Lanlan Cui, Fei Wu, Xiaojian Liu, Meng Zhang, Renzhi Xiao, and Changsheng Xie. Improving LDPC decoding performance for 3D TLC NAND flash by LLR optimization scheme for hard and soft decision. ACM Transactions on Design Automation of Electronic Systems. 2021, 27 (1), Article 5:1-20.

[7] Meng Zhang, Fei Wu, Qin Yu, Weihua Liu, Yifan Wang, and Changsheng Xie. Exploiting error characteristic to optimize read voltage for 3-D NAND flash memory. IEEE Transactions on Electron Devices. 2020, 67 (12): 5490-5496.

[8] Meng Zhang, Fei Wu, Qin Yu, Weihua Liu, Lanlan Cui, Yahui Zhao, and Changsheng Xie. BeLDPC: bit errors aware adaptive rate LDPC codes for 3D TLC NAND flash memory. Design, Automation, and Test in Europe (DATE), 2020.

Professional Affiliations

CCF Member

Research group

Novel Nonvolatile Storage Systems (NNSS) Research Group

Enrollment Information

Welcome the diligent students (background in computer, communication, mathematics, optics, and electronics) who are keen on scientific research to apply for the Master and Ph.D student in our research group.

Personal Homepage

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